1. Field of the Invention
The present invention relates to a flat panel display, and more particularly, to an apparatus and method for controlling picture quality of a flat panel display, which are capable of increasing the periodicity of dither patterns to prevent a boundary from appearing between adjacent dither patterns having different compensation values and suppressing FRC flicker.
2. Discussion of the Related Art
Flat panel display devices are light in weight and can be made small in size compared with cathode ray tube displays. Examples of flat panel displays include a liquid crystal display, a field emission display, a plasma display panel and an organic light emitting diode display.
Examples of methods for finely controlling picture quality of the flat panel displays include error diffusion, dithering, and frame rate control (FRC).
FIG. 1 is a view showing an example of the FRC method in which data is supplied to any one pixel during four frame periods.
FRC temporally disperses a compensation value and corrects a gray level of original data with a gray level smaller than the compensation value.
In order to represent a gray level higher than the gray level of input data by a ¼ gray level, in the FRC, as shown in FIG. 1A, “1” is added to the input data during one frame period, in bit digital data which will be displayed in the same pixel during the four frame periods. One frame period is the time used for displaying a first line to a last line of a screen, and is 1/60 sec in a national television system committee (NTSC) standard, and is 1/50 sec in a phase alternation line (PAL) standard. In order to represent a gray level higher than the gray level of the input data by a ½ gray level, in the FRC, as shown in FIG. 1B, “1” is added to the input data during two frame periods, in bit digital data which will be displayed in the same pixel during the four frame periods. In order to represent a gray level higher than the gray level of the input data by a ¾ gray level, in the FRC, as shown in FIG. 1C, “1” is added to the input data during three frame periods, in bit digital data which will be displayed in the same pixel during the four frame periods.
Dithering spatially disperses a compensation value and corrects the gray level of original data with a gray level smaller than the compensation value. As shown in FIG. 2, a gray-level value added to original data is determined by the number of pixels to which a compensation value “1” is added in a unit window including a plurality of pixels. For example, the number of pixels, to which the compensation value “1” is added in four pixels, in a ¼ dither pattern shown in (a) of FIG. 2, the number of pixels, to which the compensation value “1” is added in four pixels, is two in a ½ dither pattern shown in (b) of FIG. 2, and the number of pixels, to which the compensation value “1” is added in four pixels, is three in a ¾ dither pattern shown in (c) of FIG. 2.
A combination of FRC and dithering may be applied. For example, in the FRC, various types of dither patterns shown in FIG. 3 are dispersed in the unit of a frame period. FIG. 3 shows an example of the FRC using the dither patterns shown in FIG. 2. However, in the FRC, small-sized pixels, to which the compensation value is applied, are uniformly arranged in the same dither pattern. If the same dither pattern is repeated during several frame periods, a variation in brightness between dither patterns having different compensation values may be increased. As a result, periodic noise appears in the displayed screen.
FIG. 4 is a view showing an example of display unevenness that occurs when data having the same gray level is supplied to a liquid crystal display panel, due to a defect of the panel. In FIG. 4, a portion of the liquid crystal display panel denoted by a dotted ellipse indicates a portion in which darkness is increased toward a right side when displaying data having the same gray level. In order to uniformly correct the brightness in a panel defect region, compensation values are added to data during several frames by the FRC using dither patterns of which the compensation values are increased toward the right side. As shown in FIG. 4, in a related art FRC, the size of the dither pattern may be as small as 8 pixels×8 pixels, and the pixels to which the compensation value is added are the same in the dither patterns having the same compensation value, and the same dither pattern is vertically and horizontally repeated with a small period. Accordingly, the brightness is rapidly changed in a boundary between the dither patterns as denoted by a blue curve and a thin bright line or black line may be displayed in the boundary when the compensation is performed stepwise according to a dither pattern having a predetermined size.
FIGS. 5A to 5C show examples of a picture-quality defect region. FIG. 5A shows a thin oblique-line pattern, FIG. 5B shows a thin horizontal-line pattern, and FIG. 5C shows a thin vertical-line pattern. Patterns such as those shown in FIGS. 5A to 5C are generated because, when the same dither pattern is horizontally and vertically repeated with the small period, the compensation values are not temporally/spatially dispersed in the dither patterns and a data bunching phenomenon occurs in a specific pattern.
Such a data bunching phenomenon may cause a horizontal-line pattern shown in FIG. 6 or FRC flicker shown in FIGS. 7A and 7B, according to the gray level of the data.
FIG. 6 shows a dither pattern having a gray level of 4n+2 (where n is a natural number including 0). As shown, if the polarities of data in the dither pattern are inverted by a vertical 2-dot inversion method, brightness is slightly increased by the compensation value having the same polarity and having a diagonal pattern shape. Thus, a thin oblique-line pattern appears and a color band having two horizontal-line patterns appears.
FIGS. 7A and 7B show dither patterns having gray levels of 4n+1 and 4n+3, respectively, As shown, if the polarities of data in the dither pattern are inverted by a vertical 2-dot inversion method, the increase in brightness due to the compensation value varies with a period of two frame resulting in a FRC flicker phenomenon.